RiscV

Terms:

Page Table Entry (PTE)

PTE is an entry that tells where in physical memory a given page is. it also contain permissions for said page.

wayyy more here: [1]

hart

Hardware thread

STD:

Extensions:

ZKR

The entropy source extension defines the seed CSR at address 0x015. This CSR provides up to 16

physical entropy bits that can be used to seed cryptographic random bit generators.

SVVPTC

ratified Jun 29, 2024 and added in linux 6.12. Obviating Memory-Management Instructions after Marking PTEs Valid

Smmpm

Smnpm

Ssnpm

All instruction to use pointer masking at different levels[2]

Sources:


  1. : RISC-V Page Table I - Simon Sun

  2. : https://raw.githubusercontent.com/riscv/riscv-j-extension/master/zjpm-spec.pdf