PTE is an entry that tells where in physical memory a given page is. it also contain permissions for said page.
wayyy more here: [1]
Hardware thread
The SBI provides a standardized communication channel for communication from S-mode to M-mode. Can do things like shutting down the system, sending messages between processor cores (harts), or managing power states.[5]
Firmware Features Extension allows the operating system (in S-mode) to control or ask about specific features handled by the firmware (M-mode) through the #Supervisor Binary Interface (SBI). [4]
Non exhaustive list of things that can be controlled using FWFT:
TLDR the FWFT extension provides a standard way for Linux to ask the firmware for support and to turn on a feature.
bfloat16 (brain floating point) floating-point format is a computer number format occupying 16 bits. Made for AI and it uses: Zfbfmin, Zvfbfmin and Zvfbfwma check page 159
Cache management operations check page 213
Atomic Memory operations check page 97
Load-Reserved/Store-Conditional Instructions check page 92
Base Counters and Timers check page 73
Hardware Performance Counters check page 76
The entropy source extension defines the seed CSR at address 0x015. This CSR provides up to 16
physical entropy bits that can be used to seed cryptographic random bit generators.
ratified Jun 29, 2024 and added in linux 6.12. Obviating Memory-Management Instructions after Marking PTEs Valid
All instruction to use pointer masking at different levels[2]
Used for fine-grained TLB invalidation. Without Svinval you would use something like SFENCE.VMA
which will often invalidate way more that the TLB entry that you are targeting. Svinval is more precise.[6]
Cache-Block Operations Prefetch.Provides a standard way for software to give these prefetching hints to the hardware. It adds new instructions like PREFETCH.R
(prefetch for a future read) and PREFETCH.W
(prefetch for a future write).[6]
Byte and Half-word Atomic. Adds atomic operations for Byte and Half-word (16 bits).[6]
SiFive is an American fabless designer of RISC-V CPU, they make their own extensions:
xsfvqmaccdod
, xsfvqmaccqoq
, xsfvfwmaccqqq
Matrix multiplication is the mathematical foundation of modern neural networks. Having dedicated instructions to speed this up can provide a massive performance boost for AI tasks.[7]
xsfvfnrclipxfqf
In AI, it's common to use different numerical precisions. This instruction helps efficiently convert 32-bit floating-point numbers to 8-bit integers, a crucial step in optimizing AI models for inference.[7]
: https://raw.githubusercontent.com/riscv/riscv-j-extension/master/zjpm-spec.pdf
: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/src/ext-firmware-features.adoc
: https://lists.riscv.org/g/tech-brs/attachment/361/0/riscv-sbi.pdf
: https://www.phoronix.com/news/Linux-6.16-New-SiFive-RISC-ISA