Terms

Sub-NUMA Clustering (SNC)

Division of the memory and core of a CPU in an optimized fashion as to make sure to reduce the latency of memory calls [1]

Resource Director Technology (RDT)

A Big QoS (quality of services) system that manages cpu, cache and ram resources to be optimal in set scenarios [2]

Trust Domain Extensions (TDX)

AMD SEV For intel, memory protection for VMs [3]

Performance Limit Reasons

Gives you why the CPU isn't boosting to oblivion, current temp or anything else... [4]

Platform Monitoring Technology (PMT)

Intel PMT is a standardized way of exposing telemetry through host-based and out-of-band access across client, server and companion products.[5]

Efficiency Latency Control (ELC)

ELC is a Frequency scaling feature that will seek to:

  1. allow flooring of the frequency if CPU is used under a certain threshold (elc_floor_freq_khz and elc_low_threshold_percent) ex 800mhz if CPU doing nothing
  2. allow maxing the frequency if CPU used over a certain threshold (elc_high_threshold_percent) ex 5ghz if CPU is 100%
  3. all of that in 100mhz increment for best result ex cpu is at 50% at 2.6ghz so we don't move

added to linux 6.12 [6]

In-Field Scan (IFS)

added in linux 5.19 for Xeon Sapphire Rapids (2023)

Check the whole CPU for defect in silicon. really useful for the part of the CPU which wouldn't have error correction/checking[7]

some existing scan inside IFS: Scan at Field (SAF) and ArrayBist

Structural Based Functional Test at Field (SBAF)

added with Intel Xeon 6 "Granite Rapids" (end 2024) and Linux 6.12

SBAF is part of IFS, it can work 1 core at a time and isolate that core while testing. SBAF test is also divided into multiple batches, and each batch test can take hundreds of milliseconds (100-200 ms) to complete. If such a lengthy interruption is undesirable, it is recommended to relocate the time-sensitive applications to other cores for the duration of the test.[8]

Hyper-Threading

a type of Simultaneous multithreading (SMT), two thread to one core

Linear Address Masking (LAM)

added in Linux 6.4, disabled (unless you disable mitigations) in 6.12-rc5. Allow for (64bits) pointers to store metadata. The metadata will be stored right before the last bit bypassing the issues that occured when AMD tried to implement their own version of the same thing and had issues because the last bit is used in the kernel. LAM is available in 2 flavor: 48-bits (4-level paging) or 57-bits (5-level paging). TLDR 64bits pointers are way to big for us to fully use, lets used the waisted space as storage, sadly exploits makes this very complicated.[9]

Advanced Performance Extensions (APX)

Intel APX doubles the number of general-purpose registers (GPRs) from 16 to 32 and more......[10]

Sources:

  1. : Sub-NUMA Clustering - frankdenneman.nl

  2. : Intel® Resource Director Technology (Intel® RDT)

  3. : Trust Domain Extensions - Wikipedia

  4. : Intel Performance Limit Reasons Coming To Linux 6.11 - Phoronix

  5. : GitHub - intel/Intel-PMT

  6. : Intel Efficiency Latency Control "ELC" Feature Slated For Linux 6.12 - Phoronix

  7. : Linux 5.19 Lands New Intel IFS Driver For Helping To Detect Faulty Silicon - Phoronix

  8. : Intel Granite Rapids Brings New "SBAF" Core Testing Capability - Phoronix

  9. : Linux 6.12-rc5 Disabling Intel's Linear Address Masking "LAM" Due To Security Concerns - Phoronix

  10. : Introducing Intel® Advanced Performance Extensions (Intel® APX)